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ISSN 2063-5346
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MODELING OF AMBA AHB BUS USING VERILOG HDL

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Dr. Khaja Mujeebuddin Quadry ,Dr. M Khaleelullah Khan, Mr. Mohammed Abdul Raqeeb ,Dr. S.P. Venu Madhava Rao
» doi: 10.48047/ecb/2023.12.8.773

Abstract

This paper describes modeling of AMBA AHB protocol using Verilog HDL. The Advanced High Speed Bus (AHB) is part of the Advanced Micro Controller Bus Architecture protocol family. The AMBA AHB is for high clock frequency, highperformance system modules

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